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| Content Provider | Springer Nature Link |
|---|---|
| Author | Michael, Navin Vid, A. P. Moy, Christophe Palicot, Jacques |
| Copyright Year | 2011 |
| Abstract | Emerging communication paradigms like the cognitive radio require extremely flexible physical layer functional units that can be parameterized at runtime for supporting multiple modes. Parameterizing the hardware accelerators in the cognitive radio baseband incurs a latency penalty, which is a function of the amount of reconfiguration data required by the accelerators. In an opportunistic spectrum access scenario, the cumulative latency required to reconfigure all the physical layer units when switching to a new channel reduces the useful time available for transmission, leading to a lower system throughput. Against this background, this paper gives an overview of the amount of reconfiguration data required by different candidate accelerator architectures for performing the computationally intensive channelization function, in the digital front-end of the cognitive radio terminal. The paper also identifies opportunities for reusing hardwired stages of a channelization accelerator across multiple modes, while minimizing the reconfiguration overhead. |
| Starting Page | 799 |
| Ending Page | 821 |
| Page Count | 23 |
| File Format | |
| ISSN | 0278081X |
| Journal | Circuits, Systems, and Signal Processing |
| Volume Number | 30 |
| Issue Number | 4 |
| e-ISSN | 15315878 |
| Language | English |
| Publisher | SP Birkhäuser Verlag Boston |
| Publisher Date | 2011-05-04 |
| Publisher Place | Boston |
| Access Restriction | One Nation One Subscription (ONOS) |
| Subject Keyword | Channelization Cognitive radio Digital front-end Flexibility hardware reuse Opportunistic spectrum access Reconfiguration latency Electronics and Microelectronics, Instrumentation Electrical Engineering Signal, Image and Speech Processing Circuits and Systems |
| Content Type | Text |
| Resource Type | Article |
| Subject | Applied Mathematics Signal Processing |
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