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A symbolic modelling approach for the formal verification of integrated mixed-mode systems
| Content Provider | Semantic Scholar |
|---|---|
| Author | Hendricx, Stefan Claesen, Luc J. M. |
| Copyright Year | 1996 |
| Abstract | In this paper, a symbolic modelling approach is presented for the formal representation and verification of mixed analog/digital systems. The proposed modelling technique can be incorporated in the SFG-Tracing - a pragmatic methodology originally aimed at the formal verification of digital (VLSI) designs. Existing symbolic analysis and reasoning techniques can be employed to analyse the digital subsystems of a mixed analog/digital design. The development of appropriate, symbolic models to express the functional behaviour of the individual analog components, ultimately enables us to exploit a symbolic evaluation or simulation tool to formally verify the overall functional behaviour of a mixed-mode system. |
| Starting Page | 4 |
| Ending Page | 4 |
| Page Count | 1 |
| File Format | PDF HTM / HTML |
| DOI | 10.14236/ewic/dcc1996.4 |
| Alternate Webpage(s) | http://www.bcs.org/upload/pdf/ewic_ci96_paper4.pdf |
| Alternate Webpage(s) | https://doi.org/10.14236/ewic%2Fdcc1996.4 |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |