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A Practical Approach to the Formal Verification of SoC’s with Symbolic Model-Checking
| Content Provider | Semantic Scholar |
|---|---|
| Author | Dumitrescu, Emil |
| Copyright Year | 2003 |
| Abstract | The successful application of model-checking to industrial designs calls for a minimal set of efficiency criteria. This work addresses these issues, based on the linear-time model-checking verification of an instruction cache controller designed by ST Microelectronics. |
| Starting Page | 98 |
| Ending Page | 110 |
| Page Count | 13 |
| File Format | PDF HTM / HTML |
| DOI | 10.1007/978-1-4615-0351-4_10 |
| Alternate Webpage(s) | http://tima.imag.fr/publications/files/rr/paf_145.pdf |
| Alternate Webpage(s) | https://doi.org/10.1007/978-1-4615-0351-4_10 |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |