A Low-Power VLSI Architecture for Face Verification Using Elastic Graph Matching

Article

Low Power Two-Tier GALS Architecture for Multi Robot Collision Avoidance

Article

Low complexity, low power vlsi architectures for image codecs

Article

Low-power VLSI decoder architectures for LDPC codes

Article

Low-Power VLSI Architectures for Error Control Coding and Wavelets

Article

Certain Investigations On Power Reduction In A Viterbi Decoder Using Low Power VlSI Architectures

Thesis

VLSI implementation of programmable FFT architectures for OFDM communication system

Article

Algorithms and architectures for low power spike.

Investigations on power delay product of low power VLSI architectures for fir filter

Thesis