A 3.125-Gb/s clock and data recovery circuit for the 10-Gbase-LX4 Ethernet

Article

CMOS building blocks for 10+Gb/s clock data recovery circuit

Article

A 3.125-Gb/s Burst-mode clock and data recovery circuit with a data-injection oscillator using half rate clock techniques

Article

LECTURE 220 - CLOCK AND DATA RECOVERY CIRCUITS - III (Reference (6)) A 10-Gb/s CMOS CLOCK AND DATA RECOVERY CIRCUIT WITH FREQUENCY DETECTION Specification and Technology Generic Clock and Data Recovery Block Diagram:

Article

A 10-Gb/s CMOS clock and data recovery circuit with a half-rate binary phase/frequency detector

Article

A 56 Gb/s Analog PLL for Clock Recovery

Design and Characterization of a 10 Gb/s Clock and Data Recovery Circuit Implemented with Phase-Locked Loop

Article

A 20 Gb/s Injection-Locked Clock and Data Recovery Circuit

Article

A 155.52 mbps-3.125 gbps continuous-rate clock and data recovery circuit

Article