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A CMOS 0 . 18 μ m 4 bits PROGRAMMABLE DELAY CONTROL FOR UWB TIMED ARRAY BEAMFORMING RADAR APPLICATION
| Content Provider | Semantic Scholar |
|---|---|
| Author | Oliveira, Alexandre M. De Garay, Jorge R. B. Baudrand, Henri Manera, L. T. Kofuji, Sergio Takeo João Justo, Fernanda |
| Copyright Year | 2014 |
| Abstract | We present a Programmable Delay Control (PDC) for UWB Timed Array Radar Application, working with pulses in the GHz region, which requires a precise control of delays in the order of picoseconds. The major compo nent of the PDC consists of a channel formed by two static inve rt rs connected in series. Between the internal transitio n line (Vlinha) and the ground line (Vss), a digital variable capacitor is used to control the time of transitions (low-to-high and high-to-low) through their different times of charging and discharging. The circuits are designed using the integrated Spice en vironment with MicroWind 3 and LTSpice 4 VLSI Full custom project tools with the IBM SiGe 0.18 um process foundry. The Spice simulations showed a controllable delay time betwee n 0 and 97ps, which, in the EM tests with CST Microwave Studi o 2011, resulted in a controlled beam with center frequency of 4GHz, angular width of 27 ° and variable deflection betwen 12 o and 13 o, with a 8.3dB directivity and sidelobe of-11dB . |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.sige.ita.br/anais/XVISIGE/pdf/ST_9_1.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
