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WCET Optimizations and Architectural Support for Hard Real-Time Systems
| Content Provider | Semantic Scholar |
|---|---|
| Author | Ding, Yiqiang |
| Copyright Year | 2012 |
| Abstract | WCET ANALYSIS AND OPTIMIZATIONS OF THE REAL-TIME APPLICATIONS ON MULTI-CORE PROCESSORS By Yiqiang Ding, Ph.D. A dissertation submitted in partial fulfillment of the requirements for the degree of Doctor of Philosophy at Virginia Commonwealth University. Virginia Commonwealth University, 2012. Director: Dr. Wei Zhang, Associate Professor, Department of Electrical and Computer Engineering As time predictability is critical to hard real-time systems, it is not only necessary to accurately estimate the worst-case execution time (WCET) of the real-time tasks but also desirable to improve either the WCET of the tasks or time predictability of the system, because the real-time tasks with lower WCETs are easy to schedule and more likely to meat their deadlines. As a real-time system is an integration of software and hardware, the optimization can be achieved through two ways: software optimization and time-predictable architectural support. In terms of software optimization, we first propose a loop-based instruction prefetching approach to further improve the WCET comparing with simple prefetching techniques such as Next-N-Line prefetching which can enhance both the average-case performance and the worst-case performance. Our prefetching approach can exploit the program control-flow information to intelligently prefetch instructions that are most likely needed. Second, as inter-thread interferences in |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://scholarscompass.vcu.edu/cgi/viewcontent.cgi?article=1429&context=etd&httpsredir=1&referer= |
| Alternate Webpage(s) | https://scholarscompass.vcu.edu/cgi/viewcontent.cgi?article=1429&context=etd |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
