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Drowsy キャッシュを提案する.提案手法に対し、性能とリークエネルギーの削減に関しての評価を行う. Evaluation of Algorithms to Change Cache Line Mode in Drowsy Caches
| Content Provider | Semantic Scholar |
|---|---|
| Author | Zushi, Junpei Tomiyama, Hiroyuki Takada, Hiroaki Inoue, Koji |
| Copyright Year | 2006 |
| Abstract | In the design of embedded systems, especially battery-powered systems, it is important to reduce energy consumption. In these days, cache memories are used not only in general-purpose processors but also in processors for embedded systems. Static energy (leakage energy) consumed in cache has been increasing with the decrease of the feature size. The Drowsy cache is one of the techniques to reduce leakage energy consumption of caches. The Drowsy cache reduces leakage energy by changing cache line mode into the low-leakage mode. In the Drowsy cache, when the cache line in the low-leakage mode is accessed, it has to be changed into the normal mode, and it takes one or more clock cycles. Thus, these penalty cycles may significantly degrade the cache performance. In this paper, we propose three kinds of Way-Prediction Drowsy Cache which achieve a high-energy reduction with the minimum performance overhead. Experimental results demonstrate the effectiveness of the proposed cache architectures. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www.cpc.ait.kyushu-u.ac.jp/~koji.inoue/paper/2006/ARC06Zushi.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
