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Network Address Translation using a Programmable Dataplane Processor
| Content Provider | Semantic Scholar |
|---|---|
| Author | Vallejo, Juan Sebastián Feferman, Daniel Lazkani Rothenberg, Christian Esteve |
| Copyright Year | 2018 |
| Abstract | A short-term solution for the depletion of Internet Protocol (IP) addresses and scaling problems in network routing is the reuse of IP address by placing Network Address Translators (NAT) at the borders of stub domains. In this article, we propose an implementation of NAT using Programming ProtocolIndependent Packet Processors (P4) language, taking advantage of its features such as target-agnostic dataplane programmability. Through the MACSAD framework, we generate a software switch that achieves high performance with the support of different hardware (H/W) and Software (S/W) platforms. The main contributions of this paper relate to the performance evaluation results of the NAT implementation using P4 language with MACSAD compiler. |
| File Format | PDF HTM / HTML |
| DOI | 10.5753/wperformance.2018.3333 |
| Volume Number | 17 |
| Alternate Webpage(s) | https://intrig.dca.fee.unicamp.br/wp-content/plugins/papercite/pdf/mejia2018network.pdf |
| Alternate Webpage(s) | https://portaldeconteudo.sbc.org.br/index.php/wperformance/article/download/3333/3295 |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
