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Optimising Convolutional Neural Networks for Reconfigurable Acceleration
| Content Provider | Semantic Scholar |
|---|---|
| Author | Zhao, Ruizhe Niu, Xinyu |
| Copyright Year | 2017 |
| Abstract | Convolutional Neural Network (CNN) is one of the most popular deep learning technique that has been used inmany tasks, including image classification andmachine translation. FPGA is a promising target hardware platform to deploy CNN models, because it has balanced performance and can be integrated with many platforms, from embedded devices to data-centre servers. Even though, FPGA is still less popular thanGPU andCPU regarding CNNmodel deployment platform, whichmainly due to the difficulty lies in converting high-level CNN descriptions to runnable FPGA hardware designs. This report aims at addressing this problem and provides two hardware libraries for constructing CNN on FPGA, one (RubyConv) is written in high-level language Ruby and the other one (MaxDeep) is written in OpenSPL. This report also presents a CNN model transpiler framework, Plumber, that can directly transform high-level models to FPGA designs with a novel model-hardware co-optimisation module. The evaluation shows that the design generated and model-hardware co-optimised by the Plumber transpiler framework can achieve competitive performance. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://www.imperial.ac.uk/media/imperial-college/faculty-of-engineering/computing/public/1617-pg-projects/ZhaoR-Accelerating-Convolutional-Neural-Network-(CNN)-on-Embedded-FPGA-Platforms-Through-Network-Hardware-Co-Optimisation.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
