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Function Validation of a Program Logic Using Software Usage Testing
| Content Provider | Semantic Scholar |
|---|---|
| Author | Chang, Wen-Kui Wang, Tzu-Po |
| Copyright Year | 2001 |
| Abstract | Function validation of program logic is important and attentive by lots of system managers. This paper investigates issues on evaluating embedded control systems built by the function block diagram (FBD), which is a kind of graphical language used to create program logic that is analogous to circuit diagrams. Our testing FBD environment is embedded on the Tristation 1131 software system with the industry-standard IEC1131-3 conformance. In this research, software usage testing (SUT) is studied to verify if it is possible to be applied in such domain. Essentially, software usage testing first establishes a usage model, and then follows to statistically generate test cases. The usage model is represented as a graph in which the nodes represent usage states and the arcs represent stimuli that cause transitions between usage states. The FBD-primitive application can be transformed into a logical usage model to simulate the real execution scenarios. Based on the usage model, test cases can be randomly generated with the purpose of achieving complete test coverage and we may then quantitatively determine when to stop the testing process for saving the testing effort. |
| Starting Page | 29 |
| Ending Page | 44 |
| Page Count | 16 |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://www2.thu.edu.tw/~sci/journal/v3/000303.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |