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Function validation of a program logic using software usage testing (2001).
| Content Provider | CiteSeerX |
|---|---|
| Author | Chang, Wen-Kui Wang, Tzu-Po |
| Abstract | Function validation of program logic is important and attentive by lots of system managers. This paper investigates issues on evaluating embedded control systems built by the function block diagram (FBD), which is a kind of graphical language used to create program logic that is analogous to circuit diagrams. Our testing FBD environment is embedded on the Tristation 1131 software system with the industry-standard IEC1131-3 conformance. In this research, software usage testing (SUT) is studied to verify if it is possible to be applied in such domain. Essentially, software usage testing first establishes a usage model, and then follows to statistically generate test cases. The usage model is represented as a graph in which the nodes represent usage states and the arcs represent stimuli that cause transitions between usage states. The FBD-primitive application can be transformed into a logical usage model to simulate the real execution scenarios. Based on the usage model, test cases can be randomly generated with the purpose of achieving complete test coverage and we may then quantitatively determine when to stop the testing process for saving the testing effort. |
| File Format | |
| Publisher Date | 2001-01-01 |
| Access Restriction | Open |
| Subject Keyword | Function Validation Graphical Language Logical Usage Model Function Block Diagram Fbd Environment Program Logic Software Usage Testing Arc Represent Stimulus Software Usage Program Logic Using Software Usage Control System Complete Test Coverage Fbd-primitive Application Test Case System Manager Testing Process Software System Industry-standard Iec1131-3 Conformance Usage State Real Execution Scenario Usage Model |
| Content Type | Text |
| Resource Type | Article |
