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Multi-level storage in phase-change memory devices
| Content Provider | Semantic Scholar |
|---|---|
| Author | Sebastian, Abu Gallo, Manuel Le Koelmans, Wabe W. Papandreou, Nikolaos Pozidis, Haris Eleftheriou, Evangelos |
| Copyright Year | 2016 |
| Abstract | Phase-change memory (PCM) is a promising technology f r both storage class memory and emerging nonvon Neumann computing systems. For both application s, a key enabling technology is the ability to stor e multiple resistance levels in a single device. Mult i-level storage is achieved by modulating the size of the crystalline/amorphous phase configuration. A key ch allenge, in this respect, is the device variability , which can be addressed by iterative programming schemes. When retrieving the stored information, the two additional challenges are resistance drift and lowfrequency noise. Resistance drift is attributed to a spontaneous structural relaxation of the unstable a morphous states to a more stable “ideal glass” stat e and is well captured by a collective relaxation model. Thi s model, in conjunction with the electrical transpo rt models, provides a complete description of the time /temperature dependence of electrical transport in PCM devices. To counter resistance drift, several strat egies have been devised, such as drift-resilient re ad-out mechanisms as well as coding and detection schemes. Th e techniques have helped to demonstrate storin g up to 8 levels of information in a single PCM devic e. Yet another fascinating new approach is that of driftresilient device architectures. Experimental result s on prototype devices show remarkable promise in t rms of eliminating drift as well as low-frequency noise . |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://www.zurich.ibm.com/pdf/sto/Y2016_sebastian_EPCOS_Final.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
