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DesignCon 2011 On-Chip Characterization of Signal and Power Integrity in 3-D Packaged Systems
| Content Provider | Semantic Scholar |
|---|---|
| Copyright Year | 2010 |
| Abstract | Characterization of I/O channels, signal quality, and supply noise in 3-D packaged systems is very challenging due to the small footprint and complex 3-D interaction. This paper presents several enabling techniques to allow on-chip signal and power integrity characterization for the 3-D packaged systems. They provide comprehensive in-situ characterization capabilities for measuring overall link margins, capturing signal waveforms, characterizing supply noise and its impact, and measuring power delivery network (PDN). These techniques are demonstrated in a low-power memory test system realized in Package-on-Package (POP) environment, with good correlation between the measurement data and simulation results. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://bbs.hwrf.com.cn/downpcbe/11-TH2Paper_Lan-5454.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |