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What defects escape our tests ... and how will we detect them in the future
| Content Provider | Semantic Scholar |
|---|---|
| Author | Nigh, Phil |
| Copyright Year | 2000 |
| Abstract | Finally, each panelist will discuss what new test methods must be added to their suite of tests in the next 5 years to ensure these defect types are detected. The “new” test methods that will be discussed include: • very low temperature testing • very low VDD testing • high voltage stressing • testing at burn-in conditions • new approaches to IDDQ (IDDX) testing • thermal testing, “depowering”, retention test for logic circuits • delay-oriented structural testing • logic built-in self test (BIST) • embedded memory retention and BIST |
| Starting Page | 1123 |
| Ending Page | 1123 |
| Page Count | 1 |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://www.computer.org/csdl/proceedings/itc/2000/6547/00/65471123.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
