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A Dynamic Latched Comparator for Low Supply Voltage Applications
| Content Provider | Semantic Scholar |
|---|---|
| Copyright Year | 2015 |
| Abstract | The comparator is a key building block for applications where digital information needs to be recovered from analog signals, such as analog-to-digital (A/D) converters, I/O data receivers, memory bit line detectors, etc. The trend of achieving both higher speed and lower power consumption in these applications makes dynamic latch comparators very attractive, as they achieve fast decisions by strong positive feedback [1] and have no static power consumption. This appendix presents a dynamic latched comparator suitable for applications with very low supply voltage [2]. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://rd.springer.com/content/pdf/bbm:978-3-319-17680-2%2F1.pdf |
| Language | English |
| Access Restriction | Open |
| Content Type | Text |
| Resource Type | Article |
