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The VHSIC Hardware Description Language-A Glimpse of the Future
| Content Provider | Semantic Scholar |
|---|---|
| Author | Waxman, Ron |
| Copyright Year | 2006 |
| Abstract | T his issue ofDesign & Test provides a basis for understanding the new hardware design and description language being developed under the auspices of the Department of Defense's Very-HighSpeed Integrated Circuits (VHSIC) Program. The language is popularly known by the acronym VHDL, which stands for VHSIC Hardware Description Language. It employs structures of building blocks to describe complex VLSI designs in terms of abstract architectural concepts, all in an integrated, descriptive unit. The language allows the user to separate control from dataflows; differentiate between memoried and combinatorial elements; create user-defined types; and describe a design hierarchically, thus facilitating the design process. Other excellent hardware description languages in industry today cover various aspects of hardware design and description, but none matches VHDL's total capabilities. The six articles in this issue were selected to give the reader a general understanding of VHDL from several points of view. Each author was either a direct contributor to the government contract, a consultant during the development work, or a progenitor of the VHDL concept; some authors played multiple roles. All believe in the value of VHDL and want to improve it through language extensions. This common desire is especially clear in the critique of VHDL. The first article, "VHDL Motivation," by Allen Dewey and Anthony Gadient, explains the many reasons for a standard design and description language. The motivation came from the Department of Defense, but the need is universal. The authors discuss the elements motivating HDL use, particularly VHDL, and examine VHDL's potential impact on government, academic, and industrial participation in electronic research, education, and business. The authors certainly understand these motivations; Dewey was government contracting officer throughout the proposal phase, as well as for much of the implementation phase of the language and support environment from mid-1982 through August 1985. Gadient is intimately involved with the DoD VHSIC program. The article sets the stage for those that follow. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | https://www.computer.org/csdl/mags/dt/1986/02/04069755.pdf |
| Language | English |
| Access Restriction | Open |
| Subject Keyword | Acronyms Contract agreement Dewey Decimal Classification Hardware description language Integrated circuit Motivation Programming Languages Turing test VHDL VHSIC Very-large-scale integration |
| Content Type | Text |
| Resource Type | Article |
