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Two op-amps third-order sigma – delta modulator with 61-dB SNDR , 6-MHz bandwidth and 6-mW power consumption
| Content Provider | Semantic Scholar |
|---|---|
| Author | Bonizzoni, Edoardo Perez, Aldo Pena Maloberti, Franco Garcia-Andrade, Miguel Angel |
| Copyright Year | 2011 |
| Abstract | This low-power RD modulator targets the DVBH requirements and achieves about 10 bit with 6-MHz signal band. Suitable topological modifications enable the realization of a third order modulator with two op-amps. Moreover, a technique for swing reduction of the last op-amp strongly reduces the number of comparators in the quantizer. The power reduction techniques limit the consumption to 6.18 mW, thus yielding a FoM of 0.58 pJ/ conversion. The area of the circuit, fabricated with a 0.18-lm analog CMOS technology, is 0.32 mm. Experimental measurements confirm the behavioral study made accounting for the op-amps limitations. |
| File Format | PDF HTM / HTML |
| Alternate Webpage(s) | http://ims.unipv.it/FIRB2006/pub/Bonizzoni11.pdf |
| Alternate Webpage(s) | http://ims.unipv.it/~franco/JournalPaper/114.pdf |
| Language | English |
| Access Restriction | Open |
| Subject Keyword | Analog Bandwidth (signal processing) CMOS Comparator DVB-H Delta-sigma modulation Fluor-Op Low-power broadcasting Megahertz Modulator Device Component Operational amplifier Quantization (signal processing) Requirement Ruby Document format SINADR postoperative infection |
| Content Type | Text |
| Resource Type | Article |
