NDLI: Robust Capacity Planning in Semiconductor Manufacturing

Please wait, while we are loading the content...

Robust Capacity Planning in Semiconductor Manufacturing

Content Provider	Semantic Scholar
Author	Bermon, Stuart August, Sarah Hoody
Copyright Year	2001
Abstract	We present a stochastic programming approach to capacity planning under demand uncertainty in semiconductor manufacturing. Given multiple demand scenarios together with associated probabilities, our aim is to identify a set of tools that is a good compromise for all these scenarios. More precisely, we formulate a mixed-integer program in which expected value of the unmet demand is minimized subject to capacity and budget constraints. This is a difficult two-stage stochastic mixed-integer program which can not be solved to optimality in a reasonable amount of time. We instead propose a heuristic that can produce near-optimal solutions. Our heuristic strengthens the linear programming relaxation of the formulation with cutting planes and performs limited enumeration. Analyses of the results in some real-life situations are also presented. IBM T. J. Watson Research Center, Yorktown Heights, NY 10598 IBM Microelectronics Division
File Format	PDF HTM / HTML
Alternate Webpage(s)	http://www.ieor.columbia.edu/~oktay/scaps.ps
Alternate Webpage(s)	http://www.optimization-online.org/DB_FILE/2001/10/379.pdf
Alternate Webpage(s)	https://www.researchgate.net/profile/Francisco_Barahona/publication/227654806_Robust_capacity_planning_in_semiconductor_manufacturing._Naval_Research_Logistics_52(5)_459-468/links/0a85e52f2a07849ab9000000.pdf
Language	English
Access Restriction	Open
Subject Keyword	Heuristic Inclusion Body Myositis (disorder) Integer (number) Integer programming Large Linear programming relaxation Probability Programming model Real life Semiconductor device fabrication Solutions Solver Stochastic process Stochastic programming Thomas J. Watson Research Center
Content Type	Text
Resource Type	Article

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in