NDLI: Advanced Cache Coherence Issues

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Advanced Cache Coherence Issues

Content Provider	Scilit
Author	Solihin, Yan
Copyright Year	2015
Description	In Chapter 7, we have discussed basic issues in cache coherence protocols, focusing on the design of broadcast/snoopy protocols on various interconnects (shared bus and point-to-point). In this chapter, we will look into more advanced issues in cache coherence protocol design. One of the issues is how cache coherence protocols can scale to a larger system size. Broadcast and snoopy protocols hit a scalability issue relatively early because traffic and snoop frequency scale at least linearly with the number of processors. Available interconnect bandwidth gets saturated quickly with broadcast traffic. We will discuss directory cache coherence protocols, which allows for scalable implementation by avoiding broadcasts. We will use them to discuss implementation issues for coherence protocols such as how to deal with protocol races, the use of transient states, etc. Finally, we will discuss contemporary multicore design issues, such as dealing with imprecise directory information, looking into whether coherence should be tracked at a single or multiple granularities, how coherence can be designed to allow a multicore system to be partitioned, and a how thread migration cost may be reduced. Book Name: Fundamentals of Parallel MULTICORE Architecture
Related Links	https://content.taylorfrancis.com/books/download?dac=C2013-0-18751-7&isbn=9780429069413&doi=10.1201/b20200-10&format=pdf
Ending Page	370
Page Count	40
Starting Page	331
DOI	10.1201/b20200-10
Language	English
Publisher	Informa UK Limited
Publisher Date	2015-11-18
Access Restriction	Open
Subject Keyword	Book Name: Fundamentals of Parallel MULTICORE Architecture Hardware and Architecturee Implementation Cache Coherence Protocols
Content Type	Text
Resource Type	Chapter

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