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Perspectives on Multicore Architectures
| Content Provider | Scilit |
|---|---|
| Author | Solihin, Yan |
| Copyright Year | 2015 |
| Description | This book is about parallel multicore architectures. What is a multicore architecture? A multicore architecture is an architecture where multiple processor cores are integrated on a single die$ ^{1}$ . A processor core is also popularly referred to as a central processing unit (CPU). A processor core or CPU typically refers to a processing element capable of independently fetching and executing instructions from at least one instruction stream. As such, a core typically includes logic such as instruction fetch unit, program counter, instruction scheduler, functional units, register file, etc. Beyond that, what other components a core includes is less clearcut. To many, a small memory closely integrated with the core, the level 1 (L1) cache, is considered a part of the core. To some, the level 2 (L2) cache is considered a part of a core because it is private to the core. The term “processor” is not consistently used. Sometimes it is used to refer to the die where the cores are located. Sometimes it is used to refer to the CPU. To avoid confusion, in this book I will restrict the term “core” to include only the CPU, without the L1 and L2 caches, and the term “processor” to refer to any CPUs without considering any specific cores. To refer to the die or chip, this book will use the term “processor die” or “processor chip”. Book Name: Fundamentals of Parallel MULTICORE Architecture |
| Related Links | https://content.taylorfrancis.com/books/download?dac=C2013-0-18751-7&isbn=9780429069413&doi=10.1201/b20200-1&format=pdf |
| DOI | 10.1201/b20200-1 |
| Language | English |
| Publisher | Informa UK Limited |
| Publisher Date | 2015-11-18 |
| Access Restriction | Open |
| Subject Keyword | Book Name: Fundamentals of Parallel MULTICORE Architecture Hardware and Architecturee Multicore Architecture |
| Content Type | Text |
| Resource Type | Chapter |
