NDLI: Low-Voltage Nanometer-Scale CMOS RF Front-End Block Design Employing Magnetic Feedback Techniques

Please wait, while we are loading the content...

Low-Voltage Nanometer-Scale CMOS RF Front-End Block Design Employing Magnetic Feedback Techniques

Content Provider	Scilit
Author	Papananos, Yannis Vitzilaios, Georgios Theodoratos, Gerasimos
Copyright Year	2018
Description	A broad range of modern high-volume consumer applications require the availability of low-power and wireless microsystems. These systems, among others, should conciliate low-voltage, low-power operation with reduced overall dimensions and versatility. In addition, recent advances in complementary metal oxide semiconductor (CMOS) processes lead to nanometer-scale transistor structures, suitable for high-frequency operation. In this chapter, the authors present design approaches suitable for low-voltage operation and techniques to improve circuit performance that may operate with power supplies below 1V, focusing on the linearity improvement of both low-noise amplifiers (LNA) and mixer designs. They examine design limitations for low-voltage supply and show how magnetic feedback can be used for improving the reverse isolation and linearity of a low-voltage LNA and for enhancing the noise and linearity performance of a mixer operating at 1 V. The authors also examine how magnetic feedback can be used in order to increase the linearity of an integrated LNA, while still focusing on low-voltage applications. Book Name: Circuits at the Nanoscale
Related Links	https://content.taylorfrancis.com/books/download?dac=C2009-0-06295-X&isbn=9781315218762&doi=10.1201/9781315218762-17&format=pdf
Ending Page	318
Page Count	30
Starting Page	289
DOI	10.1201/9781315218762-17
Language	English
Publisher	Informa UK Limited
Publisher Date	2018-10-08
Access Restriction	Open
Subject Keyword	Book Name: Circuits At the Nanoscale Hardware and Architecturee Low Voltage Applications Structures Recent Advances Magnetic Feedback
Content Type	Text
Resource Type	Chapter

Central Library (ISO-9001:2015 Certified)
Indian Institute of Technology Kharagpur
Kharagpur, West Bengal, India | PIN - 721302

See location in the Map
03222 282435
Mail: support@ndl.gov.in

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in