NDLI: Modelling and efficiency optimisation of UHF Dickson rectifiers

Content Provider	IET Digital Library
Author	Gharehbaghi, Kaveh Zorlu, Özge Koçer, Fatih Külah, Haluk
Abstract	This paper presents a new time-efficient modelling approach for UHF Dickson rectifiers. Due to the very low computation time, the approach can provide a quick and effective alternative to the standard transient simulations. The presented approach results in better estimation of the generated DC voltage and power conversion efficiency compared with the similar works in the literature. For the first time, an accurate mathematical relationship, including the non-zero reverse current, is expressed for finding the open load voltage of the Dickson rectifier while covering the broad range of RF amplitudes. The model uses the relation between the peak forward current and the load current to develop an input-to-output formula. Unlike the previous works, the channel length modulation is taken into consideration for the first time making the proposed model ideal for UHF Dickson rectifiers implemented with submicron CMOS transistors. Moreover, the proposed model takes secondary effects, such as the body effect and short-channel effects into account resulting in a more accurate estimation of the generated output DC voltage. Using the presented approach, a Dickson rectifier working at 900 MHz is implemented in a 0.18 µm CMOS process. Good agreement between simulation results, predicted results, and measurement results is observed.
Starting Page	504
Ending Page	513
Page Count	10
ISSN	1751858X
Volume Number	10
e-ISSN	17518598
Issue Number	Issue 6, Nov (2016)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/10/6
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2015.0323
Journal	IET Circuits, Devices & Systems
Publisher Date	2016-11-01
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Analogue Circuit Design Body Effect Channel Length Modulation CMOS Analogue Integrated Circuit CMOS Integrated Circuit CMOS Process Computation Time Frequency 900 MHz Generated DC Voltage Generated Output DC Voltage Hybrid Integrated Circuit Input-to-output Formula Integrated Circuit Modelling Layout Load Current Microwave IC Modelling Modelling And Testing Nonzero Reverse Current Open Load Voltage Peak Forward Current Power Conversion Efficiency Power Electronics Power Supply Rectifier RF Amplitudes Semiconductor Integrated Circuit Design Short-channel Effect Size 0.18 Mum Standard Transient Simulation Submicron CMOS Transistors Supervisory Circuit Testing Time-efficient Modelling Approach UHF Dickson Rectifier UHF Integrated Circuit
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

Design of high-efficiency CMOS rectifier with low reverse leakage for RF energy harvesting

Design of broadband Class E power amplifier in continuous operation modes

Third-order tunable-phase asymmetric cross-coupled oscillator

Design of a CMOS Distributed Power Amplifier with Gradual Changed Gain Cells

Fast transient response DC–DC converter with start-up in-rush current control

Analogue circuit design methodology using self-cascode structures

On-chip dual-phase charge-transfer relaxation oscillator with comparator offset cancellation

Threshold voltage compensation scheme for RF-to-DC converter used in RFID applications

Power-area-efficient transient-improved capacitor-free FVF-LDO with digital detecting technique

Modelling and efficiency optimisation of UHF Dickson rectifiers

Similar Documents

Design of high-efficiency CMOS rectifier with low reverse leakage for RF energy harvesting

Design of broadband Class E power amplifier in continuous operation modes

Third-order tunable-phase asymmetric cross-coupled oscillator

Design of a CMOS Distributed Power Amplifier with Gradual Changed Gain Cells

Fast transient response DC–DC converter with start-up in-rush current control

Analogue circuit design methodology using self-cascode structures

On-chip dual-phase charge-transfer relaxation oscillator with comparator offset cancellation

Threshold voltage compensation scheme for RF-to-DC converter used in RFID applications

Power-area-efficient transient-improved capacitor-free FVF-LDO with digital detecting technique

Modelling and efficiency optimisation of UHF Dickson rectifiers