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Content Provider | IET Digital Library |
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Author | Belkamel, Hamza Mekhilef, Saad Masaoud, Ammar Naeim, Mohsen Abdel |
Abstract | Series connection of power cells in asymmetrical cascaded configurations helps to cancel redundant output levels and maximise the number of different levels generated by the inverter. A new configuration of three-phase multilevel asymmetrical cascaded voltage source inverter is presented. This structure consists of series-connected sub-multilevel inverters blocks. The number of utilised switches, insulated gate driver circuits, voltage standing on switches, installation area and cost are considerably reduced. Cascaded-cell DC voltages in each inverter leg form an arithmetic sequence with common difference of E. With the selected inverter DC sources, high-frequency pulse-width modulation (PWM) control methods can be effectively applied without loss of modularity. Low-frequency and sinusoidal PWM techniques were successfully applied. Hence, high flexibility in the modulation of the proposed inverter is demonstrated. The prototype of the suggested inverter was manufactured and the obtained simulation and hardware results ensured the feasibility of the configuration, and the compatibility of both modulation techniques was accurately noted. Lastly, the semiconductor losses in the converter were calculated using simulation models. Based on the analysis of the total power losses, the proposed inverter provided high efficiency at different operating conditions. |
Starting Page | 1696 |
Ending Page | 1706 |
Page Count | 11 |
ISSN | 17554535 |
Volume Number | 6 |
e-ISSN | 17554543 |
Issue Number | Issue 8, Sep (2013) |
Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/iet-pel/6/8 |
Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/iet-pel.2012.0508 |
Journal | IET Power Electronics |
Access Restriction | Open |
Rights Holder | © The Institution of Engineering and Technology |
Subject Keyword | Arithmetic Sequence Cascaded-cell DC Voltage Driver Circuit High-frequency Pulse-width Modulation Control Method Insulated Gate Driver Circuit Inverter DC Source Loss Low-frequency PWM Technique Power Cell Power Electronics Power Loss Power Semiconductor Device Power Semiconductor Switches Power Supply Pulse Circuit PWM Invertors Redundant Output Level Cancellation Relay And Switches Semiconductor Loss Series Connection Series-connected Submultilevel Inverter Block Simulation Model Sinusoidal PWM Technique Supervisory Circuit Switch Utilisation Switching Converter Three-phase Asymmetrical Cascaded Multilevel Voltage Source Inverter Voltage Standing |
Content Type | Text |
Resource Type | Article |
Subject | Electrical and Electronic Engineering |
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