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| Content Provider | IET Digital Library |
|---|---|
| Author | Liang, Huaguo Chang, Hao Li, Yang Wang, Wei Chen, Tian Xu, Hui |
| Abstract | One notable difference between 3D test flow and 2D test flow mainly lies in the mid-bond test, in which the stacking yield can be further enhanced through optimized bonding arrangement. In contrast to the existing sequential stacking, this paper proposes a novel rearranged stacking scheme which estimates the probability and cost of failed bonding in each stacking step and optimizes the mid-bond order to screen out the failed component as early as possible. The effect of the rearranged stacking has been extensively analyzed using the yield model and cost model of 3D-SICs considering different process parameters such as die yield, stacking size, failure rate and redundancy degree of TSVs. Experimental results demonstrate that the proposed rearranged stacking method is only a half of the sequential stacking in terms of Failed area ratio (FAR). |
| Starting Page | 224 |
| Ending Page | 228 |
| Page Count | 5 |
| ISSN | 10224653 |
| Volume Number | 24 |
| e-ISSN | 20755597 |
| Issue Number | Issue 2, Apr (2015) |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/cje/24/2 |
| Alternate Webpage(s) | https://digital-library.theiet.org/content/journals/10.1049/cje.2015.04.001 |
| Journal | Chinese Journal of Electronics |
| Publisher Date | 2015-04-01 |
| Access Restriction | Open |
| Rights Holder | © Chinese Institute of Electronics |
| Subject Keyword | 2D Test Flow 3D Stacked Integrated Circuit 3D Test Flow Die Yield Failed Area Ratio Failed Bonding Failure Rate Integrated Circuit Bonding Integrated Circuit Reliability Integrated Circuit Testing Integrated Circuit Yield Layout Microassembly Technique Modelling And Testing Optimized Midbond Order Reliability Semiconductor Integrated Circuit Design Sequential Stacking Stacking Size Three-dimensional Integrated Circuit Yield Model |
| Content Type | Text |
| Resource Type | Article |
| Subject | Applied Mathematics Electrical and Electronic Engineering |
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