NDLI: About 250/285 GHz push–push oscillator using differential gate equalisation in digital 65-nm CMOS

Content Provider	IET Digital Library
Author	Fahs, Bassem Wu, Kefei Aouimeur, Walid Mansha, Muhammad Waleed Gaquière, Christophe Gamand, Patrice Knap, Wojciech Hella, Mona M.
Abstract	This study presents a push–push oscillator architecture based on differential gate equalisation to enhance the oscillation frequency while providing relatively high output power with ultra-compact layout form factor. The frequency enhancement is derived as a function of the equivalent RLC model of the oscillator's main constituents. The proposed principle is applied to a terahertz oscillator in the 200–300 GHz range to mitigate the excessive substrate and skin effect losses in standard digital 65-nm complementary metal–oxide–semiconductor technology at such high frequencies. The design concept is validated using two single-stage push–push oscillators. The first oscillator shows −8.1 dBm output power at 250 GHz oscillation frequency and −106.8 dBc/Hz phase noise at 10 MHz offset while consuming 76 mW power from 1.5 V DC supply voltage. The chip area is 200 × 250 μm2. The second oscillator provides −14.8 dBm output power at 285 GHz and −106 dBc/Hz phase noise at 10 MHz offset with 80 mW power consumption from 1.5 V DC supply. The chip area is 200 × 200 μm2.
Starting Page	2073
Ending Page	2080
Page Count	8
ISSN	17518725
Volume Number	13
e-ISSN	17518733
Issue Number	Issue 12, Oct (2019)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-map/13/12
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-map.2018.5308
Journal	IET Microwaves, Antennas & Propagation
Publisher Date	2019-06-10
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Analogue Circuit Design CMOS Digital Integrated Circuit CMOS Integrated Circuit Design Concept Differential Gate Equalisation Digital CMOS Equivalent RLC Model Field Effect MIMIC Frequency 200.0 GHz to 300.0 GHz Frequency Enhancement High Output Power Integrated Circuit Layout Layout Microwave IC Millimetre Wave Oscillator Modelling Modelling And Testing Oscillation Frequency Oscillator Phase Noise Power 76.0 MW Power 80.0 MW Power Consumption RLC Circuit Semiconductor Integrated Circuit Design Single-stage Push–push Oscillators Size 65 Nm Skin Effect Skin Effect Loss Standard Digital Complementary Metal–oxide–semiconductor Technology Terahertz Oscillator Testing Ultra-compact Layout Form Factor Voltage 1.5 V
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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