NDLI: Real-time digital multi-function protection system on reconfigurable hardware

Content Provider	IET Digital Library
Author	Wang, Yifan Dinavahi, Venkata
Abstract	This study proposes a multi-function power system protective relay hardware design built with various functional hardware processing cores on the field programmable gate array (FPGA). This practical and systematic method lends itself to a paralleled and pipelined hardware emulation of individual signal processing and protection components. Detailed emulation designs are presented for the following protective relays: distance, directional overcurrent, voltage, and frequency protection. The necessary signal processing functions required to operate these relays are also emulated, allowing the protection system to be stand-alone and fed with instantaneous fault data. Real-time experimental results are presented to verify the functions of the target hardware relay on the Xilinx® Virtex-7 FPGA. Case studies provide the efficacy of the multi-function relay design in terms of accuracy, latency, and resource consumption.
Starting Page	2295
Ending Page	2305
Page Count	11
ISSN	17518687
Volume Number	10
e-ISSN	17518695
Issue Number	Issue 10, Jul (2016)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-gtd/10/10
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-gtd.2015.0718
Journal	IET Generation, Transmission & Distribution
Publisher	The Institution of Engineering and Technology
Publisher Date	2016-07-07
Access Restriction	Open
Rights License	Creative Commons Attribution License (http://creativecommons.org/licenses/by/3.0/)
Subject Keyword	Directional Overcurrent Relay Protection Distance Relay Protection Field Programmable Gate Array Frequency Relay Protection Functional Hardware Processing Core Logic Circuit Multifunction Power System Protective Relay Hardware Design Overcurrent Protection Paralleled Hardware Emulation Pipelined Hardware Emulation Power System Fault Power System Protection Protection Apparatus Real-time Digital Multifunction Protection System Relay Protection Resource Consumption Signal Processing Signal Processing And Detection Signal Processing Function Voltage Relay Protection Xilinx Virtex 7 FPGA
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Energy Engineering and Power Technology Electrical and Electronic Engineering

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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