NDLI: Low-power SOI CMOS antenna switch driver circuit with RF leakage suppression and fast switching time

Content Provider	IET Digital Library
Author	Lee, I. Y. Im, D.
Abstract	A low-power antenna switch driver circuit with RF leakage suppression and fast switching time is implemented in a 0.25 μm silicon-on-insulator (SOI) CMOS process. It is composed of a three-stage current starved ring oscillator with a clock buffer, a charge pump and a latch-based three-state logic driver. The negative voltage from the charge pump is fed into the latch-based three-state logic driver, and it generates three states of logic level (+VDD, GND and −VDD) according to the decoder signal without any reliability issue. In addition, the proposed three-state logic driver with an optimal negative resistance value reduces the amount of the RF leakage coupling into the charge pump while maintaining its switching time fast. In the measurement, the designed switch driver circuit shows <0.1 V of voltage loss under 150 μA of current consumption. A single-pole double-throw antenna switch employing the proposed switch driver circuit is implemented in a 0.25 μm SOI CMOS process. The measurement shows higher than +38 dBm of 1 dB compression point (P1dB) and 140 ns of switching time while allowing <0.5 dB of insertion loss and >30 dB of isolation over 100 MHz to 3 GHz frequency range.
Starting Page	293
Ending Page	294
Page Count	2
ISSN	00135194
Volume Number	53
e-ISSN	1350911X
Issue Number	Issue 5, Mar (2017)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/el/53/5
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/el.2016.4307
Journal	Electronics Letters
Publisher Date	2017-01-30
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	Charge Pump Charge Pump Circuit Clock Buffer CMOS Integrated Circuit Current 150 MuA Decoder Signal Driver Circuit Fast Switching Time GND Latch-based Three-state Logic Driver Logic Level Low Power Electronics Low-power Antenna Switch Driver Circuit Negative Voltage Optimal Negative Resistance Value Power Electronics Power Supply RF Leakage Suppression Silicon-on-insulator Single-pole Double-throw Antenna Switch Size 0.25 Mum SOI CMOS Process Supervisory Circuit Three-stage Current Starved Ring Oscillator Time 140 Ns VDD −VDD
Content Type	Text
Resource Type	Article
Subject	Electrical and Electronic Engineering

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