NDLI: Geostatistical-inspired fast layout optimisation of a nano-CMOS thermal sensor

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Geostatistical-inspired fast layout optimisation of a nano-CMOS thermal sensor

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Geostatistical-inspired fast layout optimisation of a nano-CMOS thermal sensor

Content Provider	IET Digital Library
Author	Okobiah, Oghenekarho Mohanty, Saraju P. Kougianos, Elias
Abstract	Continuous and aggressive scaling of semiconductor technology has led to persistent and dominant nanoscale effects on analogue/mixed-signal (AMS) circuits. Design space exploration and optimisation costs using conventional techniques have increased to infeasible levels. Hence, growing research for alternative design and metamodelling techniques with a much reduced design space exploration and optimisation cost and high level of accuracy, continues to be very active. This study presents a geostatistical inspired metamodelling and optimisation technique for fast and accurate design optimisation of nano-complementary metal oxide semiconductor (CMOS) circuits. The design methodology proposed integrates a simple Kriging technique with efficient and accurate prediction characteristics as the metamodel generation technique. A gravitational search algorithm (GSA) is applied on the generated metamodel (substituted for the circuit netlist) to solve the design optimisation problem. The proposed methodology is applicable to AMS circuits and systems. Its effectiveness is illustrated with the optimisation of a 45 nm CMOS thermal sensor. With six design parameters, the design optimisation time for the thermal sensor is decreased by 90% and produces an improvement of 36.8% in power consumption. To the best of the authors' knowledge this is the first work to use GSA for analogue design optimisation.
Starting Page	253
Ending Page	262
Page Count	10
ISSN	1751858X
Volume Number	7
e-ISSN	17518598
Issue Number	Issue 5, Sep (2013)
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/iet-cds/7/5
Alternate Webpage(s)	https://digital-library.theiet.org/content/journals/10.1049/iet-cds.2012.0358
Journal	IET Circuits, Devices & Systems
Access Restriction	Open
Rights Holder	© The Institution of Engineering and Technology
Subject Keyword	AMS Circuit Analogue Design Optimisation Analogue-mixed-signal Circuit Circuit Optimisation CMOS Integrated Circuit Combinatorial Mathematics Design Optimisation Problem Design Space Exploration Dominant Nanoscale Effects Geostatistical Inspired Metamodelling Technique Geostatistical-inspired Fast Layout Optimisation Gravitational Search Algorithm GSA Integrated Circuit Layout Integrated Circuit Modelling Kriging Technique Layout Metamodel Generation Technique Modelling And Testing NanoCMOS Circuit Design Optimisation NanoCMOS Thermal Sensor Nanoelectronics Optimisation Cost Optimisation Technique Power Consumption Search Problem Semiconductor Integrated Circuit Design Semiconductor Technology Sensing Device And Transducers Size 45 Nm Statistical Analysis Statistics Temperature Sonsor
Content Type	Text
Resource Type	Article
Subject	Control and Systems Engineering Electrical and Electronic Engineering

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