NDLI: A novel high-capability control-flow checking technique for RISC architectures

Content Provider	IEEE Xplore Digital Library
Author	Jianghong Huang Yuxiang Li Lisheng Zhang Yingke Xie Chengde Han
Copyright Year	2008
Description	Author affiliation: Inst. of Comput. Technol., Chinese Acad. of Sci., Beijing (Jianghong Huang; Yuxiang Li; Lisheng Zhang; Yingke Xie; Chengde Han)
Abstract	Nowadays more and more small transistors make microprocessors more susceptible to transient faults, and then induce control-flow errors. Software-based signature monitoring is widely used for control-flow error detection. When previous signature monitoring techniques are applied to RISC architectures, there exist some branch-errors that they can not detect. This paper proposes a novel software-based signature monitoring technique: CFC-End (Control-Flow Checking in the End). One property of CFC-End is that it uses two global registers for storing the run-time signature alternately. Another property of CFC-End is that it compares the run-time signature with the assigned signature in the end of every basic block. CFC-End is better than previous techniques in the sense that it can detect any single branch-error when applied to RISC architectures. CFC-End has similar performance overhead in comparison with the RCF (Region based Control-Flow checking) technique, which has the highest capability of branch-error detection among previous techniques.
Starting Page	258
Ending Page	263
File Size	186860
Page Count	6
File Format	PDF
ISBN	9780769532875
DOI	10.1109/ICESS.2008.77
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-07-29
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Reduced instruction set computing Program processors Microprocessors Computer architecture Hardware Registers Monitoring
Content Type	Text
Resource Type	Article

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