NDLI: IIIModes: New Efficient Dynamic Routing Algorithm for Network on Chips

Content Provider	IEEE Xplore Digital Library
Author	Morvarid, M. Fathy, M. Berangi, R. Khademzadeh, A.
Copyright Year	2009
Abstract	Network on Chip is emerging as a solution to the existing interconnection architecture constraints. Performance parameters like latency, throughput are critical issues in interconnection network design. Routing algorithms have a prominent impact on communication and performance in on chip interconnection networks. This paper presents a new dynamic routing algorithm called "IIIModes" for low latency communication in on chip interconnection networks. The proposed routing algorithm for avoiding congested areas switches among three routing modes deterministic, minimal adaptive and non-minimal adaptive routing to lead to select the best port to the destination. We also present a novel selection policy that can be coupled with any adaptive non-minimal routing algorithm. Our experimental results show that IIIModes achieves considerable better performance than other traditional routing algorithms under different traffic patterns.
Starting Page	57
Ending Page	62
File Size	669145
Page Count	6
File Format	PDF
ISBN	9781424446803
DOI	10.1109/ICCGI.2009.16
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-08-23
Publisher Place	France
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Dynamic Routing Heuristic algorithms Multiprocessor interconnection networks Switches Telecommunication traffic Minimal Path Routing Telecommunication computing Network on Chip Delay Communication switching Network-on-a-chip Non Minimal Path Computer networks Selection Policy
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in