NDLI: Megawatt-scale power hardware-in-the-loop simulation testing of a power conversion module for naval applications

Content Provider	IEEE Xplore Digital Library
Author	Langston, J. Bogdan, F. Hauer, J. Schoder, K. Steurer, M. Dalessandro, D. Fikse, T. Cherry, J. Gonstead, S.
Copyright Year	2015
Description	Author affiliation: Center for Adv. Power Syst., Florida State Univ., Tallahassee, FL, USA (Langston, J.; Bogdan, F.; Hauer, J.; Schoder, K.; Steurer, M.) \|\| Carderock Div., Naval Surface Warfare Center, Philadelphia, PA, USA (Dalessandro, D.) \|\| BMT Syntek, Arlington, VA, USA (Fikse, T.) \|\| DRS Technol., Milwaukee, WI, USA (Gonstead, S.) \|\| Cardinal Eng., Annapolis, MD, USA (Cherry, J.)
Abstract	In June through October of 2014, power-hardware-in-the-loop (PHIL) simulation testing of a 1.2 MW, 4.16 kV AC / 1 kV DC power conversion module for naval applications was conducted. In these tests, the device-under-test (DUT) was interfaced to a virtual surrounding system that was generally representative of the power system of a future surface combatant. Tests were focused on demonstration of operation and performance of the DUT through dynamic conditions in a realistic environment, collection of data for characterization and validation of models of the DUT, and collection of data for assessment of the accuracy and suitability of the approach for testing future power conversion modules. These tests were the culmination of numerous coordinated efforts over preceding months to identify, implement, and verify the necessary surrounding systems and supporting models, define meaningful test procedures, and develop, implement, and test appropriate controls and protection systems. The tests successfully concluded with a large amount of data of the behavior of the DUT under a wide range of expected system conditions. Moreover, this project identified the need to further develop PHIL interface algorithms such as the damped impedance method to improve accuracy and stability of future PHIL experiments at the megawatt scale.
Starting Page	268
Ending Page	275
File Size	859062
Page Count	8
File Format	PDF
e-ISBN	9781479918577
DOI	10.1109/ESTS.2015.7157902
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2015-06-21
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Phase change materials Accuracy Power system stability Power conversion Voltage control Load modeling Testing
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

A new control method for the power interface in power hardware-in-the-loop simulation to compensate for the time delay

Real-time modeling of multi-level megawatt class power converters for Hardware-In-the-Loop testing

Design and implementation of a kilowatt-scale power interface based on power hardware-in-the-loop simulation

Improve the Stability and the Accuracy of Power Hardware-in-the-Loop Simulation by Selecting Appropriate Interface Algorithms

Accuracy evaluation of power hardware-in-the-loop simulation of a boost chopper

MW-scale power hardware-in-the-loop experiments of rapid power transfers in MVDC naval shipboard power systems

Three-phase voltage stability studies embedding a StatCom

Voltage depending load models. Validation by voltage step tests

A methodology for characterizing and modeling inverters for grid integration studies using Power Hardware-in-the-Loop

Megawatt-scale power hardware-in-the-loop simulation testing of a power conversion module for naval applications

Similar Documents

A new control method for the power interface in power hardware-in-the-loop simulation to compensate for the time delay

Real-time modeling of multi-level megawatt class power converters for Hardware-In-the-Loop testing

Design and implementation of a kilowatt-scale power interface based on power hardware-in-the-loop simulation

Improve the Stability and the Accuracy of Power Hardware-in-the-Loop Simulation by Selecting Appropriate Interface Algorithms

Accuracy evaluation of power hardware-in-the-loop simulation of a boost chopper

MW-scale power hardware-in-the-loop experiments of rapid power transfers in MVDC naval shipboard power systems

Three-phase voltage stability studies embedding a StatCom

Voltage depending load models. Validation by voltage step tests

A methodology for characterizing and modeling inverters for grid integration studies using Power Hardware-in-the-Loop

Megawatt-scale power hardware-in-the-loop simulation testing of a power conversion module for naval applications