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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Broadbent, S.B. |
| Copyright Year | 1989 |
| Description | Author affiliation: Rockwell Int. Sci. Center, Anaheim, CA, USA (Broadbent, S.B.) |
| Abstract | A description is given of a cryogenic CMOS process, Rockwell Cryogenic CMOS (RC/sup 2/), for use in readout circuits for impurity band conduction detectors that must operate at a temperature of 12 K or less. The RC/sup 2/ process has been successfully used to implement both analog and digital circuits that operate very well at 10 K. The behavior of RC/sup 2/ FETs in the weak inversion region is discussed. To minimize the power consumption of the large arrays of analog detector readout circuits, the subthreshold region of FET operation is utilized. MOSFETs at these temperatures exhibit the kink effect and have long time constants to reach equilibrium after a large bias change, which must be considered in circuit design. It is concluded that the RC/sup 2/ approach has overcome some of the major obstacles to basic functionality of circuits at temperatures below freezeout and in weak as well as strong inversion.<> |
| Starting Page | 43 |
| Ending Page | 47 |
| File Size | 228703 |
| Page Count | 5 |
| File Format | |
| DOI | 10.1109/LTSE.1989.50179 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 1989-08-07 |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Energy consumption Temperature Impurities Cryogenics Detectors CMOS process FETs Digital circuits MOSFETs Sensor arrays |
| Content Type | Text |
| Resource Type | Article |
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