NDLI: ASQED

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2015 6th Asia Symposium on Quality Electronic Design (ASQED)

Fifth Asia Symposium on Quality Electronic Design (ASQED 2013)

2012 4th Asia Symposium on Quality Electronic Design (ASQED)

2011 3rd Asia Symposium on Quality Electronic Design (ASQED)

Welcome to ASQED 2011

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2011 ASQED - table of contents

Thermal modeling of three-dimensional integrated circuits considering the thermal removal capability of different TSVs

Package design optimization for efficient on-chip-capacitance leveraging

Signal integrity and scalability study of a novel PoP inter-package system

Influence of the heat sink orientation and fins arrangement on the thermal behavior of high power LED

An automatic phase control circuit with DLL-like architecture for phased array antenna systems

NBTI-induced 8-Bit DAC circuit mismatch in System-On-Chip (SoC)

A 3.1–10.6 GHz frequency tunable ultra wideband LNA

On-chip 1.8 V step down DC/DC converter with 94% power efficiency

A complete methodology for determining memory BIST optimization under wrappers sharing constraints

Build-in-Self-Test of FPGA for diagnosis of delay fault

Outlier distribution detection approach to semiconductor wafer fabrication process monitoring

Application-specific selection of 6T SRAM cells offering superior performance and quality with a triple-threshold-voltage CMOS technology

Near-threshold 40nm Supply Feedback C-element

A white LED backlight driving IC with 3-bit dimming controller

Routing-aware placement technique for intelligent collision avoidance in digital microfluidic biochips

Comparison of isotropic dry etching process using XeF2 and ANisotropic Wet Etching Process using EDP for microhotplate device

Effect of heater geometry on the high temperature distribution on a MEMS micro-hotplate

Display signal interface techniques for mobile applications

Power - Reliability tradeoff in low power 4-PAM signaling in on-chip communication

A new statistical electromigration analysis methodology that incorporates across-chip temperature variation

A fully on-chip throughput measurement system for multi-gigabits/s on-chip interconnects

Timing yield slack for statistical optimization

Assessment of nano-scale asynchronous PCFB circuits under extreme process variation

Prediction model for estimating leakage power consumption of routing resources in FPGAs

Statistical leakage analysis by parallel Monte-Carlo programming on a CUDA platform

A novel and fast method for characterizing noise based PCMOS circuits

Finding the worst case supply noise excitation methodology for high speed I/O interfaces

Reliability analysis of digital circuits considering intrinsic noise

IR drop analysis in single- and multi-wall carbon nanotube power interconnects in sub-nanometer designs

Detectability analysis for resistive open faults with dynamic supply voltage scaling awareness

Low power self-checking two-rail code checker design

Symbolic model-based diagnosis with auto-correction framework for arithmetic circuits

Random work functions induced DC and dynamic characteristic fluctuations in 16-nm high-κ/metal gate CMOS device and digital circuit

Enhanced synthesis method to prepare crystalline GaAs nanowires with high growth yield

Uniform diameter and pitch co-design of 16nm n-type carbon nanotube channel arrays for VLSI

Simulation study of open circuit voltage loss at Schottky top contact in ultra-shallow junction silicon solar cells

Optimization of arsenic and phosphorus Source/Drain implantation for low power NMOS device

Memory reduction of IFFT using separated CIM (combined integer mapping) method

Hardware and software requirements for implementing a high-performance superconductivity circuits-based accelerator

Interpolation circuit design for XRF systems using FFT

An approach to code compression for CGRA

Analysis, modeling and optimization of transmission gate delay

VPIC-based image compression technique for sensor network applications

Robust gas recognition using adaptive thresholding

A novel integrated amorphous silicon TFT gate driver circuit with optimized design for TFT-LCD display panel manufacturing

Design of lane detection system based on color classification and edge clustering

NBTI degradation with optimized ID-VG sweep for wafer fabrication monitoring

0.18um low voltage 12-bit successive-approximation-register analog-to-digital converter (SAR ADC)

Linearization of GaN power amplifier using feedforward and predistortion techniques

A new functional model for wireless communication class-AB solid-state bipolar power amplifiers

The development of an enhancement-mode single-transistor SONOS cell in 0.13µm technology

A new architecture for T flip flop using quantum-dot cellular automata

Multi-stage parallel processing of design element access tasks in FPGA-based logic emulation systems

Study on the variation in thermal resistance and junction temperature of GaN based LEDs using thermal transient measurement

2nd Asia Symposium on Quality Electronic Design (ASQED)

2009 1st Asia Symposium on Quality Electronic Design

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