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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Acharya, B.A. John, V. |
| Copyright Year | 2010 |
| Description | Author affiliation: Dept. of Electrical Engineering, Indian Institute of Science, Bengaluru, India 560012 (Acharya, B.A.; John, V.) |
| Abstract | Modern PWM inverter output voltage has high dv/dt, which causes problems such as voltage doubling that can lead to insulation failure, ground currents that results in electromagnetic interference concerns. The IGBT switching device used in such inverter are becoming faster, exacerbating these problems. This paper proposes a new procedure for designing the LC clamp filter. The filter increases the rise time of the output voltage of inverter, resulting in smaller dv/dt. In addition suitable selection of resonance frequency gives LCL filter configuration with improved attenuation. By adding this filter at output terminal of inverter which uses long cable, voltage doubling effect is reduced at the motor terminal. The design procedure is carried out in terms of the power converter based per unit scheme. This generalizes the design procedure to a wide range of power level and to study optimum designs. The effectiveness of the design is verified by computer simulation and experimental measurements. |
| Starting Page | 562 |
| Ending Page | 567 |
| File Size | 1589634 |
| Page Count | 6 |
| File Format | |
| ISBN | 9781424466511 |
| e-ISBN | 9781424466535 |
| DOI | 10.1109/ICIINFS.2010.5578641 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-07-29 |
| Publisher Place | India |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Induction motors IGBT motor drives Snubbers Capacitors Resonant frequency dv/dt-filter Inverters Clamps Inductors common mode voltage |
| Content Type | Text |
| Resource Type | Article |
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