NDLI: Improved HW/SW partitioning algorithm on efficient use of hardware resource

Content Provider	IEEE Xplore Digital Library
Author	Hao Wang Hongquan Zhang
Copyright Year	2010
Description	Author affiliation: The Department of Electrical and Information Engineering, Heilongjiang Institute of Science and Technology, Harbin 150027, China (Hao Wang; Hongquan Zhang)
Abstract	This paper improved the greedy partitioning algorithm targeting hardware resource use efficiency in traditional partitioning algorithms. In the improved algorithm, introduced a guiding function, which decided by four factors: the criticality, saved time, frequency and area of tasks. The improved algorithm can not only improve the resource use efficiency, but also pay attention to the task on the critical path, which can maximized the performance of the system. On the basis of this, the designer can design the system with low power methods, minimized the power consumption as well as satisfy the system performance.
Starting Page	682
Ending Page	685
File Size	91303
Page Count	4
File Format	PDF
ISBN	9781424455850
e-ISBN	9781424455867
DOI	10.1109/ICCAE.2010.5451727
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-02-26
Publisher Place	Singapore
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy consumption Partitioning algorithms Paper technology Microprocessors System performance Embedded system guiding function Computer architecture Frequency Hardware HW/SW partitioning greedy algorithm Field programmable gate arrays
Content Type	Text
Resource Type	Article

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