NDLI: A New Design of Low Cost Security Coprocessor for Portable Electronic Devices

Content Provider	IEEE Xplore Digital Library
Author	Chao Li Yuan Jiang Dan Su Yongjun Xu Zuying Luo
Copyright Year	2010
Abstract	Security processing provides user authentication and secure communication for portable electronic devices. Security processors for portable electronic devices should occupy small area, consume low power, handle several cryptography algorithms, and provide acceptable performance. This paper presents a low cost security coprocessor architecture based on the design ideas of reconfigurability, scalability and tightly coupled structure, which can achieve four kinds of standard cryptography algorithms on a universal architecture. The new architecture can reduce the area and power consumption of security chip, and improve universality, flexibility and security of the whole system. A new algorithm is implemented by changing the contents of the instruction register in this paper. The low cost security coprocessor targets portable electronic products. Finally, simulation and experiment results are provided to verify the ideas of the paper.
Starting Page	126
Ending Page	131
File Size	265325
Page Count	6
File Format	PDF
ISBN	9781424463275
e-ISBN	9781424463282
DOI	10.1109/CMC.2010.127
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-04-12
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Energy consumption Costs Scalability Registers Power system security Communication system security scalability security coprocessor Authentication tightly coupled reconfigurability Cryptography Coprocessors
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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