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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Nan Zhang |
| Copyright Year | 2010 |
| Description | Author affiliation: Department of Computer Science and Software Engineering, Xi'an Jiaotong-Liverpool University, Suzhou, China (Nan Zhang) |
| Abstract | Performance degradation is a common problem in parallel computing as when a workload is parallelised the speedup gained is notably lower than the factor predicted by Amdahl's law. This work examines such a case where image pixels are summed up along the rows in parallel by two threads, but no speedup against the sequential summation is gained on images whose sizes exceed the capacity of the L2 cache of the processor. Counts collected by Intel $VTune^{™}Performance$ Analyser on relevant performance events show that this nonscaling problem is not caused by those well-understood pitfalls, such as cache contention, bus overloading and unbalanced workload, but that over the parallel summation the L2 prefetchers of the processor are less effective in bringing in data before they are needed. Consequently, a considerably more number of cache lines are brought into the L2 cache by demand requests originated from the L1 data caches, and for such accesses the parallel computation pay the penalty. |
| File Size | 234341 |
| File Format | |
| ISBN | 9781424463473 |
| e-ISBN | 9781424463497 |
| DOI | 10.1109/ICCET.2010.5485345 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-04-16 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Parallel nonscaling analysis Multicore processing Prefetching Degradation Computer science Linux Hardware prefetching Parallel processing Performance analysis Parallel scalability Parallel performance degradation Pixel Software engineering |
| Content Type | Text |
| Resource Type | Article |
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