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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Nan Zhang |
| Copyright Year | 2010 |
| Description | Author affiliation: Department of Computer Science and Software Engineering, Xi'an Jiaotong-Liverpool University, Suzhou, China (Nan Zhang) |
| Abstract | This paper presents a novel parallel prefix sum algorithm on n numbers by p processors. A parallel time analysis shows that this proposed algorithm is more efficient and easy-scalable than Blelloch's classic parallel solution for the same problem. Unlike Blelloch's method, the proposed algorithm does not require the number p of processors to be a power of 2, and it needs no extra buffers apart from the array that holds the numbers. For practical considerations, a variant of the proposed algorithm is further developed which incurs less overhead due to thread management and synchronisation. The Blelloch's algorithm and the variant of the proposed method are implemented via POSIX Threads, and are tested on two multicore platforms. The results showed that the variant outperformed the Blelloch's method provided that the size of the array not exceeded the total capacity of the L2 cache of the host machine. In some of the tested cases, the increase in performance was as high as 50%. |
| File Size | 233624 |
| File Format | |
| ISBN | 9781424463473 |
| e-ISBN | 9781424463497 |
| DOI | 10.1109/ICCET.2010.5485315 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2010-04-16 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Algorithm design and analysis Parallel algorithm Multicore processing Scalability Software algorithms Parallel prefix sum Parallel algorithms Concurrent computing Computer science Multi-core computing Parallel computing Parallel processing Testing |
| Content Type | Text |
| Resource Type | Article |
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