NDLI: Formation of circuit patterns on the only modification area using selective electroless deposition

Content Provider	IEEE Xplore Digital Library
Author	Baba, K. Sugimoto, M. Watanabe, M. Yumoto, T.
Copyright Year	2012
Description	Author affiliation: SANKYO KASEI Co., Ltd., Tokyo, Japan (Yumoto, T.) \|\| Japan Surface Treatment Inst. Co., Ltd., Yokosuka, Japan (Baba, K.; Sugimoto, M.; Watanabe, M.)
Abstract	The printed wiring board is contained in most electronic parts. A lot of the printed wiring boards are manufactured by the subtractive process. However, the subtractive process needs a lot of numbers of production processes. Therefore, we examined new manufacturing process that the method of forming the metal film only to a necessary part of the substrate. We executed the examination that applied selective electroless plating on the substrate. The UV irradiation and the laser irradiation attracted attention as the pretreatment technique to perform the selective plating. In addition, to solve the problem of short out in the circuit, the examination of anisotropy growth up electroless plating was examined. In these results, anisotropic growth by electroless nickel plating was found to depend on nonlinear diffusion of the Pb and Bi inhibitors at the pattern edges, where the geometry of the film growth changed depending on the species. When Pb was employed, plating growth with a trapezoidal geometry occurred which was advantageous to pattern formation. Moreover, when Pb was used in combination with Bi, the anisotropic growth became possible at lower concentrations. Regarding the selective deposition phenomenon, the direct pattern plating process was improved by initial adsorption of thiourea onto the surface by immersing the substrate in a solution that contained the inhibitor instead of initial selective plating.
Sponsorship	IEEE Components, Packaging, Manuf. Technol. Soc.
Starting Page	1
Ending Page	4
File Size	1017042
Page Count	4
File Format	PDF
ISBN	9781467326544
e-ISBN	9781467326551
DOI	10.1109/ICSJ.2012.6523467
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2012-12-10
Publisher Place	Japan
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
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3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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