NDLI: Scalability Study on Mesh Based Network on Chip

Content Provider	IEEE Xplore Digital Library
Author	Gaoming Du Duoli Zhang Yukun Song Minglun Gao Luofeng Geng Ning Hou
Copyright Year	2008
Description	Author affiliation: VLSI Res. Inst., Hefei Univ. of Technol., Hefei (Gaoming Du; Duoli Zhang; Yukun Song; Minglun Gao; Luofeng Geng; Ning Hou)
Abstract	With the development of IC technology and the increasing processing power requirement, more and more processing cores are being integrated into one single chip. One of the key problems is the communication efficiency between the processing cores, and network on chip (NoC) has been proposed as prospect architecture. In this paper, scalability issue of 2-D mesh based NoC is analyzed. First, a mesh based NoC router using XY routing algorithm is designed and implemented in FPGA prototype. Second, 22 and 33 NoCs are constructed using the above router module, with each router connected to a processing core via the resource network interface (RNI). At last, pipelined matrixes multiplications and FFT are executed to evaluate the 2-D mesh based NoC performance, together with the router area overhead in the case of increasing processing nodes numbers. Experiments showed that 2-D mesh based NoC architecture is easy scalable in increasing processing nodes numbers with small resource overhead.
Starting Page	681
Ending Page	685
File Size	400989
Page Count	5
File Format	PDF
ISBN	9780769534909
DOI	10.1109/PACIIA.2008.236
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-12-19
Publisher Place	China
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Scalability Conferences Network-on-a-chip Wires Routing Performance analysis Network interfaces System-on-a-chip Computational intelligence
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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