NDLI: A Novel Approach for Branch Buffer Consuming Power Reduction

Content Provider	IEEE Xplore Digital Library
Author	Zamani, B. Adeli, E. Gharedaghi, H. Soryani, M.
Copyright Year	2008
Description	Author affiliation: Eng. Dept., Islamic Azad Univ., Tehran (Zamani, B.) \|\| Comput. Dept., Iran Univ. of Sci. & Technol., Tehran (Adeli, E.; Gharedaghi, H.; Soryani, M.)
Abstract	By increasing the pipeline length in processors, the accuracy of the branch predictor unit plays an important role in processors efficiencies. In addition to the accuracy, consuming power is also an essential in portable systems. Therefore, in the processors these days the prediction unit is used to determine the branch destination, while most of these accesses are not necessary. In this paper, a method is proposed to reduce the consuming power in the jump prediction unit. In this proposed method, the non-necessary accesses to BTB are reduced by taking into account this fact that there exists distances between different consecutive branch instructions. This method decides the access to BTB by a constant value and a counter. After an instruction entrance, the BTB is accessed if the counter is zero, and if the instruction is a branch instruction and exists in the BTB the counter is reset. The simulation and experimental results illustrate the suitable performance of the proposed method in comparisons to the other methods. This superiority is for both the execution time and for the consuming power. Also it is more strengthened by increasing the distance.
Sponsorship	Int. Assoc. Comput. Sci. Inf. Technol.
Starting Page	436
Ending Page	440
File Size	247284
Page Count	5
File Format	PDF
ISBN	9780769535043
DOI	10.1109/ICCEE.2008.48
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2008-12-20
Publisher Place	Thailand
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy consumption Pipelines Cache memory Next Branch Distance Synchronization History Counting circuits Power engineering computing Branch Target Buffer Prediction History Table Consuming Power Reduction Power engineering and energy Clocks
Content Type	Text
Resource Type	Article

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