NDLI: Investigations using the rational unified process (RUP) diagrams for software process modeling

Content Provider	IEEE Xplore Digital Library
Author	ElenaTudoroiu, R. Cretu, V. Paquet, J.
Copyright Year	2009
Description	Author affiliation: ¿Politehnica¿ University of Timisoara, 2 Bdul Vasile, Parvan, Romania (ElenaTudoroiu, R.; Cretu, V.) \|\| Concordia University, 1455 De Maisonneuve Blvd. West, Montreal, Quebec, Canada H3G 1MB (Paquet, J.)
Abstract	In this paper we present the strategy of RUP process modeling by using various forms of UML activity diagram representations. Also we identify several deficiencies in this representation of the process. We have tried come up with a better solution so we have developed a new version of the RUP modeling representation of the business modeling, requirement, analysis and design, implementation, test, and deployment discipline diagrams using the diagramming technique called RAD. We then have analyzed this alternate representation and extended the RAD notation to include artifacts flow. We have named this extension of RAD, XRAD. We then have used XRAD to represent the above mentioned disciplines of the RUP. This proposed version will be particularly useful to process designers, who create the drafts of the process, but also to actual developers who implement the process. It is a useful tool to create simple diagrams that will look familiar to all process actors. The novelty of our modeling strategy consists of the development of several role activity diagrams (RAD) for the Business Modeling, Requirement Analysis and Design, Implementation, Test and Deployment disciplines, as an element of originality. Each RAD diagram is developed in two different versions in order to improve their structure and readability. The development of a new version for Business Modeling Requirements, Analysis and Design, Implementation, Test and Deployment disciplines, called XRAD, as a combination of the second version and the artifacts, which make them more attractive, expressive, and compact than original versions and represent another remarkable result of our research.
Starting Page	523
Ending Page	530
File Size	708814
Page Count	8
File Format	PDF
ISBN	9781424453146
DOI	10.1109/IMCSIT.2009.5352791
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-10-12
Publisher Place	Poland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Process design Unified modeling language Testing
Content Type	Text
Resource Type	Article

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1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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