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| Content Provider | IEEE Xplore Digital Library |
|---|---|
| Author | Weigong Zhang Huizhuo Niu Yuanyuan Shang Guohui Wang |
| Copyright Year | 2009 |
| Abstract | In high-speed real-time or non real-time signal processing systems, the use of mass memory for data cache is an indispensable part. It is also one of the focus and the difficulties in the realization of the system. Using the traditional method, the simulation will consume a lot of time, which would greatly reduce the efficiency of software design. To save time and resources, a simplified simulation model is put forward. Based on this module, a number of control signals are added to make the design more flexible. The paper is based on the overall idea of the design and taking a FLASH device as an example, the paper fully describes this idea. The design has proved that this is a more efficient method. The idea reflected can be widely used in the large-scale embedded system. |
| Starting Page | 637 |
| Ending Page | 640 |
| File Size | 305163 |
| Page Count | 4 |
| File Format | |
| ISBN | 9780769538594 |
| DOI | 10.1109/IITA.2009.237 |
| Language | English |
| Publisher | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Publisher Date | 2009-11-21 |
| Publisher Place | China |
| Access Restriction | Subscribed |
| Rights Holder | Institute of Electrical and Electronics Engineers, Inc. (IEEE) |
| Subject Keyword | Real time systems Software design Embedded system Automatic control Educational institutions Hardware Timing Discrete event simulation Testing Clocks |
| Content Type | Text |
| Resource Type | Article |
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