NDLI: Improving robustness of the synchronization quality of IEEE1588 nodes

Content Provider	IEEE Xplore Digital Library
Author	Ferrari, P. Flammini, A. Rinaldi, S. Bondavalli, A. Brancati, F.
Copyright Year	2010
Description	Author affiliation: Dept. of Information Engineering, University of Brescia, Via Branze, 38 - 25123, Italy (Ferrari, P.; Flammini, A.; Rinaldi, S.) \|\| University of Florence, Viale Morgagni 65, I-50134, Firenze, Italy (Bondavalli, A.; Brancati, F.)
Abstract	Nowadays the IEEE1588 synchronization protocol has been adopted in a growing number of fields, from automation to telecommunication systems. Usually, the quality of the services provided by these applications requires an accurate and reliable time synchronization. Several solutions have been already proposed to achieve these goals. However, the statistical instruments provided in the standard (PTP variance) appear to be inadequate to identify synchronization problems while unpredictable events affect the quality of the synchronization. This paper provides alternative instruments for the analysis and improvement of the synchronization quality of a IEEE 1588 system resorting to the Reliable & Self Aware (R&SA) clock. The R&SA clock provides statistical information which are shown to be able to correctly identify the different sources of problem that can affect the synchronization. The paper then makes a proposal to take advantage of the statistical data collected for improving reliability and accuracy of PTP nodes.
Starting Page	36
Ending Page	41
File Size	887343
Page Count	6
File Format	PDF
ISBN	9781424459780
e-ISBN	9781424459773
DOI	10.1109/ISPCS.2010.5609784
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2010-09-27
Publisher Place	USA
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	component quality of synchronization IEEE1588 fault-tolerant system synchronization Synchronization
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in

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