NDLI: A hardware algorithm for fast digit on-line logarithmic computation with exponential convergence rate

Content Provider	IEEE Xplore Digital Library
Author	Rui-Lin Chen Chichyang Chen
Copyright Year	2009
Description	Author affiliation: Department of Information Engineering and Computer Science, Feng Chia University, Taichung, Taiwan 407, ROC (Chichyang Chen) \|\| Department of Computer Science and Information Engineering, Fortune Institute of Technology, Kaohsiung, Taiwan, ROC (Rui-Lin Chen)
Abstract	In this research, a hardware algorithm for digit on-line logarithmic computation is proposed. This algorithm is based on a fast digit-parallel logarithmic algorithm that was proposed previously. The drawback of the previous algorithm is that the computation cannot be digit pipelined with other computations. Our new algorithm will generate the partial logarithmic result after only some input digits of the operand are available. Thus, the high throughput of the computing system can be attained with the use of digit pipelining in the design of the hardware architecture. Furthermore, the latency of the pipeline is short because the convergence rate of the algorithm is exponential. For example, when the word length of the operand is 24, the number of pipeline stages is only four. Base on our proposed digit on-line method, we have designed the architecture of a 24-bit logarithmic unit. The exhausted test of the 24-bit unit shows that our algorithm and error analysis are correct.
Starting Page	636
Ending Page	639
File Size	274472
Page Count	4
File Format	PDF
ISBN	9781424433872
DOI	10.1109/ECTICON.2009.5137130
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-05-06
Publisher Place	Thailand
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Error analysis Design methodology logarithmic computation logarithmic number system Multiplicative normalization digit on-line algorithm Throughput Convergence Pipeline processing Computer science Signal processing algorithms Computer architecture digit pipeline architecture Hardware Testing
Content Type	Text
Resource Type	Article

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