NDLI: Device Programmable CMOS Threshold Gate for Order Statistic Filtering

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IEEE Winter Workshop on Nonlinear Digital Signal Processing

IEEE Winter Workshop on Nonlinear Digital Signal Processing

List of authors

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Device Programmable CMOS Threshold Gate for Order Statistic Filtering

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Device Programmable CMOS Threshold Gate for Order Statistic Filtering

Content Provider	IEEE Xplore Digital Library
Author	Charng Long Lee Chein-Wei Jen
Copyright Year	1993
Description	Author affiliation: National Chiao Tung University, Hsinchu, Taiwan, R.O.C. (Charng Long Lee)
Abstract	Threshold gates are the key elements of order statistic filtering. A (T/n) threshold gate outputs a. logic "1" if more than or equal to T of its n inputs are logic "1". Such a threshold gate can be realized by connecting n identical CMOS inverters with their outputs wired together and sensed by a buffering inverter. The circuit, performs threshold decision in small area with fast speed. An inherent limitation is on the number of inputs. An incremental scheme is proposed to construct threshold gate networks for general threshold decision. Standard, weighted, and multi-stage order statistic filters can be realized by the threshold gates or threshold gate networks.
File Size	429549
File Format	PDF
ISBN	951721944X
DOI	10.1109/NDSP.1993.767725
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1993-01-17
Publisher Place	Finland
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Resistors CMOS logic circuits Filtering Utility programs Voltage Logic gates Pulse inverters Logic design Statistics Delay
Content Type	Text
Resource Type	Article

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