NDLI: Effects of metallization lay-out on turn-off failure of modern power bipolar transistors

Content Provider	IEEE Xplore Digital Library
Author	Busatto, G. Contei, A. Patti, A.
Copyright Year	1996
Description	Author affiliation: University of Napoli "Federico II" (Busatto, G.)
Abstract	A new simulation tool is presented which is able to describe the behaviour of the modem cellular power BJTs. It is based on SPICE circuit simulation of a rather complex circuit where each cell is described by a single transistor and all of the cells are interconnected by a resistive network. The tool is able to predict current and electric field distribution over the chip during device turn-off. The effects of metallization lay-out on failure of cellular BJTs are studied. It is demonstrated both experimentally and numerically, for the first time, that current crowding over the chip of these devices is related to different storage times of each cell and not to the emitter depolarization as it is usually assumed for devices of traditlonal design.
Starting Page	1867
Ending Page	1870
File Size	334935
Page Count	4
File Format	PDF
ISBN	0780333691
DOI	10.1109/ESREF.1996.888234
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	1996-10-08
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Bipolar transistors Metallization Electric breakdown Circuit simulation Integrated circuit interconnections SPICE Modems Proximity effect Current density Testing
Content Type	Text
Resource Type	Article

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Effects of metallization lay-out on turn-off failure of modern power bipolar transistors