NDLI: Clock-offset tracking software algorithms for IR-UWB energy-detection receivers

Content Provider	IEEE Xplore Digital Library
Author	Flury, M. Merz, R. Le Boudec, J.-Y.
Copyright Year	2009
Description	Author affiliation: EPFL, School of Computer and Communication Sciences, Switzerland (Flury, M.; Le Boudec, J.-Y.) \|\| Deutsche Telekom Laboratories, TU Berlin, Germany (Merz, R.)
Abstract	We present a clock-offset tracking algorithm for impulse-radio ultra-wide band (IR-UWB) energy-detection receivers. There is a complexity versus performance trade-off for the design of IR-UWB energy-detection receivers: Extremely low-complexity energy-detection receivers are built with a large, constant integration duration; they are robust to clock drifts but are sensitive to noise enhancement effects and cannot adapt to channel variations. More sophisticated energy-detection receivers use a shorter integration duration and combine several weighted outputs of the energy collector; they are robust to noise enhancement effects, can adapt to channel variations and offer a much better performance than non-adaptive receivers. However, they become sensitive to clock offsets. Hence, there is a need for low-complexity clock-offset tracking solutions to support adaptive energy-detection receivers. Our solution is constructed around the Radon transform, an image processing tool traditionally used to detect line features in images. Our solution is fully compatible with the IEEE 802.15.4a standard, does not increase the hardware complexity of the receiver and reduces the performance loss due to clock offset to less than 0.5 dB.
Starting Page	534
Ending Page	539
File Size	367458
Page Count	6
File Format	PDF
ISBN	9781424429301
DOI	10.1109/ICUWB.2009.5288732
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2009-09-09
Publisher Place	Canada
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Energy consumption Transmitters Software algorithms Delay estimation Physical layer Hardware Noise robustness Frequency synchronization Phase locked loops Clocks
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
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