NDLI: Multi-objective DSE algorithms' evaluations on processor optimization

Content Provider	IEEE Xplore Digital Library
Author	Chis, R. Vintan, M. Vintan, L.
Copyright Year	2013
Description	Author affiliation: Comput. Sci. & Electr. Eng. Dept., “Lucian Blaga” Univ. of Sibiu, Sibiu, Romania (Vintan, M.; Vintan, L.) \|\| Comput. Sci. Dept., Tech. Univ. Cluj-Napoca, Cluj-Napoca, Romania (Chis, R.)
Abstract	Very complex micro-architectures, like complex superscalar/SMT or multicore systems, have lots of configurations. Exploring this huge design space and trying to optimize multiple objectives, like performance, power consumption and hardware complexity is a real challenge. In this paper, using the multi-objective design space exploration tool FADSE, we tried to optimize the hardware parameters of the complex superscalar Grid ALU Processor. We compared how different heuristic algorithms handle the DSE optimization. Three of these algorithms are taken from the jMetal library (NSGAII, SPEA2 and SMPSO) while the other two, CNSGAII and MOHC were implemented by us. We show that in this huge design space the differences between the best found individuals by every algorithm are very small, only the time in which they got to these solutions differs. In order to accelerate the DSE process we also did a feature selection through machine learning techniques and ran all DSE algorithms again with a smaller number of input parameters.
Sponsorship	IEEE Romanian Sect.
Starting Page	27
Ending Page	33
File Size	272233
Page Count	7
File Format	PDF
ISBN	9781479914937
e-ISBN	9781479914944
DOI	10.1109/ICCP.2013.6646076
Language	English
Publisher	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Publisher Date	2013-09-05
Publisher Place	Romania
Access Restriction	Subscribed
Rights Holder	Institute of Electrical and Electronics Engineers, Inc. (IEEE)
Subject Keyword	Algorithm design and analysis Measurement Design Space Exploration Swarm Algorithms Sociology Multi-objective Optimization Algorithms Computer architecture Space exploration Statistics Superscalar Processor Genetic Algorithms Optimization
Content Type	Text
Resource Type	Article

Sl.	Authority	Responsibilities	Communication Details
1	Ministry of Education (GoI), Department of Higher Education	Sanctioning Authority	https://www.education.gov.in/ict-initiatives
2	Indian Institute of Technology Kharagpur	Host Institute of the Project: The host institute of the project is responsible for providing infrastructure support and hosting the project	https://www.iitkgp.ac.in
3	National Digital Library of India Office, Indian Institute of Technology Kharagpur	The administrative and infrastructural headquarters of the project	Dr. B. Sutradhar bsutra@ndl.gov.in
4	Project PI / Joint PI	Principal Investigator and Joint Principal Investigators of the project	Dr. B. Sutradhar bsutra@ndl.gov.in Prof. Saswat Chakrabarti will be added soon
5	Website/Portal (Helpdesk)	Queries regarding NDLI and its services	support@ndl.gov.in
6	Contents and Copyright Issues	Queries related to content curation and copyright issues	content@ndl.gov.in
7	National Digital Library of India Club (NDLI Club)	Queries related to NDLI Club formation, support, user awareness program, seminar/symposium, collaboration, social media, promotion, and outreach	clubsupport@ndl.gov.in
8	Digital Preservation Centre (DPC)	Assistance with digitizing and archiving copyright-free printed books	dpc@ndl.gov.in
9	IDR Setup or Support	Queries related to establishment and support of Institutional Digital Repository (IDR) and IDR workshops	idr@ndl.gov.in